Conventional power semiconductor devices include at least a semiconductor chip and a wiring terminal in which placed a connection portion electrically connected to the semiconductor chip.
Such the semiconductor device has probability of generating degradation in the connection portion when a temperature test, for example, TFT (Thermal Fatigue Test) is conducted.
Warpage is generated in a bell connection portion, for example, or crack is generated in the jointing material, for example, solder, which joints a semiconductor chip and the connection portion.